Autor Tema: Chimera Project - Broadband SDR receiver  (Leído 6909 veces)

Jack Bauer

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Chimera Project - Broadband SDR receiver
« en: Enero 06, 2012, 03:43:30 am »
Dear colleagues, I'm going to describe something I've been thinking a long ago, but due to a lack of time and knowledge about FPGA programming, I was delaying. The project is based on three building blocks:

1. RF Front-end: First, i'm going to use a TV tuner to minimize costs, but later I want to use YIG technology http://f6bon.albert.free.fr/YIG.html to expand coverage to 22 GHz.


2. High speed ADC: Texas Instruments ADS5474 14bit 400 MSPS, 1.4 GHz BW. Although it costs more than $ 300, it can be found on ebay for $ 45 http://www.ebay.es/itm/170728819404?ssPageName=STRK:MEWAX:IT&_trksid=p3984.m1423.l2649 or free sample from TI. They sent me free of charge, I hope to return the favor if this project succeeds ;) ). I have three reasons for choosing this chip:

a) It has a relatively easy to weld pins when compared with Linear LTC 2208.
b) its brutal bandwidth, capable of directly digitize nearly anything.
c) it is available as a free sample.

3. FPGA Xilinx Spartan XC3S500E: As Pieter said http://wwwhome.cs.utwente.nl/~ptdeboer/ham/sdr at his website, it is the biggest non BGA Xilinx FPGA.

I'm thinking in making a PCI board or use a GigaBit chip for computer communication.

FIRST APPROACH

Before starting the PCB design, I want to experiment driving an ADC from a FPGA, and this is the part that I cannot do for myself, FPGA programming. I need help with the FPGA.

I want to run a trainer with these two boards



I need people who can program VHDL or Handle-C.

Any help, support or suggestions would be welcome.

Best regards.


« Última modificación: Enero 06, 2012, 04:17:27 am por Jack Bauer »